1. Field of the Invention
The present invention relates generally to integrated circuits. More particularly, it pertains to alignment features for integrated circuit packages.
2. State of the Art
Photolithography and etching are two methods used to fabricate integrated circuits. In photolithography, hundreds of dice are manufactured from a single wafer. After the dice are formed on the wafer, the wafer is segmented into individual units and encapsulated to form a set of packaged integrated circuits.
A percentage of integrated circuits are defective. Some of these parts have defects from the manufacturing process. Others will malfunction within a short period of use. These imperfect integrated circuits are infant mortalities. It is important to isolate these infant mortalities so that they can be discarded prior to sale. The integrated circuit devices are tested using hot and cold conditions to stress the devices and to sort out failures. One step in this process of identifying the infant mortalities is burn-in testing.
In the burn-in test process, integrated circuits are subjected to a high level of stressful conditions, including high temperatures and high voltage. During a typical burn-in test, thousands of integrated circuits are inserted in burn-in boards, which allow electrical connectivity to the individual integrated circuits.
After an extended period of time, the integrated circuits are removed from the stressful conditions and are tested to determine if they are defective. During the testing process, a testing assembly is used to contact conductors on the integrated circuit. For proper testing, each contact on the testing assembly must contact the appropriate conductor on the integrated circuit. If a contact on the testing assembly does not accurately touch the corresponding conductor on the integrated circuit, a variety of problems can arise.
During the testing process, contacts of the testing assembly make physical and electrical contact with the conductors of the integrated circuit. If the integrated circuit is not accurately aligned with the testing assembly, the accuracy of the physical contact is jeopardized. Misaligned contacts of the testing assembly can deform the conductors and damage the integrated circuit.
Additionally, misaligned contacts of the testing assembly may not permit sufficient electrical contact between the contacts of the testing assembly and the conductors of the integrated circuit. This results in integrated circuits being falsely flagged as defects and unnecessarily increases production costs. Furthermore, integrated circuits are becoming more complex with more capabilities. As a result, leads on lead frames are being placed closer and closer together, which further complicates accurate testing procedures.
Accordingly, what is needed is a better way to align integrated circuit packages during the testing process.
The above-mentioned problems with testing of integrated circuits are addressed by the present invention which will be understood by reading and studying the following specification. An apparatus and method for testing integrated circuits is described which allows for proper alignment of leads from a lead frame during the testing process. Alternatively, the alignment features could be used during other processing steps, such as during the solder reflow process. Advantageously, the apparatus and method permit testing of the integrated circuit with reduced risk of misalignment of and damage to conductors of the lead frame.
A conductive apparatus has an alignment feature integral therewith. In one embodiment, the conductive apparatus comprises a lead frame and the alignment feature comprises an alignment tab. The alignment tab can have a number of shapes, including, but not limited to, generally square or circular shapes. In addition, the alignment tab or tabs can include two or more apertures for additional alignment options. The alignment feature can also comprise a semicircular shaped cut out on one or more edges of the lead frame. The cut out can be formed in other shapes, such as square or angular shapes.
Alternatively, an integrated circuit is provided which comprises, in part, a lead frame, a semiconductor die coupled with the lead frame, an alignment feature disposed on the lead frame, and insulating material encompassing the die and a portion of the lead frame. The lead frame has a plurality of conductors which extend out of the insulating material. In one embodiment, the alignment feature comprises an alignment tab. The alignment tab can be removably coupled with the lead frame, for instance, with a perforation line. When an integrated circuit manufacturer desires to remove the alignment tab, the tab is folded over the perforation line until the tab is severed from the lead frame.
In another embodiment, the integrated circuit includes a heat spreader thermally coupled with the lead frame. The heat spreader is disposed outside of the insulating material. Alternatively, in another embodiment, at least a portion of the heat spreader is encompassed by the insulating material. The lead frame has a first alignment cut out disposed therein, and the heat spreader has a second alignment cut out disposed therein. The first alignment cut out is aligned with the second alignment cut out.
The present invention also includes a method for forming and testing an integrated circuit package. First, a lead frame having an integral alignment feature, as described above, is provided. A semiconductor die is then coupled with the lead frame. The lead frame is partially encapsulated with insulating material. Then, the integrated circuit is tested by aligning the alignment feature with testing equipment, testing the integrated circuit, and then removing the integrated circuit package from the testing equipment. When removing the integrated circuit package from the testing equipment, the alignment feature, optionally, can be removed from the lead frame.
These and other embodiments, aspects, advantages, and features of the present invention will be set forth in part in the description which follows, and in part will become apparent to those skilled in the art by reference to the following description of the invention and referenced drawings or by practice of the invention. The aspects, advantages, and features of the invention are realized and attained by means of the instrumentalities, procedures, and combinations particularly pointed out in the appended claims.